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EL8171, EL8172
Data Sheet August 3, 2007 FN6293.3
Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers
The EL8171 and EL8172 are micropower instrumentation amplifiers optimized for single supply operation over the +2.4V to +5.5V range. Inputs and outputs can operate rail-torail. As with all instrumentation amplifiers, a pair of inputs provide very high common-mode rejection and are completely independent from a pair of feedback terminals. The feedback terminals allow zero input to be translated to any output offset, including ground. A feedback divider controls the overall gain of the amplifier. The EL8172 is compensated for a gain of 100 or more, and the EL8171 is compensated for a gain of 10 or more. The EL8171 and EL8172 have PMOS input devices that provide sub-nA input bias currents. The amplifiers can be operated from one lithium cell or two Ni-Cd batteries. The EL8171 and EL8172 input range goes from below ground to slightly above positive rail. The output stage swings completely to ground (ground sensing) or positive supply - no pull-up or pull-down resistors are needed.
Features
* 95A maximum supply current * Maximum input offset voltage - 300V (EL8172) - 1500V (EL8171) * 50pA maximum input bias current * 450kHz -3dB bandwidth (G = 10) * 170kHz -3dB bandwidth (G = 100) * Single supply operation - Input voltage range is rail-to-rail - Output swings rail-to-rail - Ground Sensing * Pb-free plus anneal available (RoHS compliant)
Applications
* Battery- or solar-powered systems * Strain gauges * Current monitors * Thermocouple amplifiers
Pinout
EL8171, EL8172 (8 LD SOIC) TOP VIEW
EN 1 IN- 2 IN+ 3 V- 4
+ + -
Ordering Information
PART NUMBER (Note) EL8171FSZ* EL8172FSZ* PART MARKING 8171FSZ 8172FSZ PACKAGE (Pb-free) 8 Ld SOIC 8 Ld SOIC PKG. DWG. # MDP0027 MDP0027
8 FB+ 7 V+ 6 VOUT 5 FB-
*Add "-T7" suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2005, 2006, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL8171, EL8172
Absolute Maximum Ratings (TA = +25C)
Supply Voltage, V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage (EL8172) . . . . . . . . . . . . . . . . . . . . . . 0.5V Differential Input Voltage (EL8171) . . . . . . . . . . . . . . . . . . . . . . 1.0V VEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Thermal Information
Thermal Resistance JA (C/W) 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 110 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature . . . . . . . . . . . . . . .-40C to +125C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
V+ = +5V, V- = GND, VCM = 1/2V+ VEN = V-, RL = Open, TA = +25C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT
PARAMETER DC SPECIFICATIONS VOS
DESCRIPTION
Input Offset Voltage
EL8171 EL8172
-1.5 -2 -0.3 -0.7
0.47 0.07 1.5 0.14
1.5 2 0.3 0.7
mV mV V/C V/C
TCVOS
Input Offset Voltage Temperature Coefficient Input Offset Current, IN, FB Input Bias Current Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio
EL8171 EL8172 -25 -500 -50 -4 Guaranteed by CMRR test VCM = 0V to +5V EL8171, V+ = 2.4V to 5V EL8172, V+ = 2.4V to 5V 0 75 75 75 -0.7 -1 -1.5
IOS IB VIN CMRR PSRR
4 10
25 500 50 4 5
pA pA pA nA V dB dB dB
100 90 100 0.15 0.2 4 0.13 0.7 +1 1.5 10 10 0.2 0.25
EG
Gain Error
EL8171, RL = 100k to 2.5V EL8172, RL = 100k to 2.5V
% % % mV mV V V V V V V
VOUT
Maximum Voltage Swing
Output low, 100k to 2.5V Output low, 1k to 2.5V Output high, 100k to 2.5V Output high, 1k to GND 4.985 4.980 4.860 4.750 45 38 EL8171: EN = V+ EL8172: EN = V+ 1.8 1.3 1.8 1.5
4.996 4.87 65 2.6 4.5 95 110 4 5 7.0 25
IS,EN IS,DIS
Supply Current, Enabled Supply Current, Disabled
A A A
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FN6293.3 August 3, 2007
EL8171, EL8172
Electrical Specifications
V+ = +5V, V- = GND, VCM = 1/2V+ VEN = V-, RL = Open, TA = +25C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. (Continued) CONDITIONS MIN (Note 1) 2 0.5 0.8 0.5 V+ to V- (Note 2) 2.4 23 19 6 4.5 19 15 5 4 32 8 26 7 5.5 TYP MAX (Note 1) UNIT V A V A V mA mA mA mA
PARAMETER VENH IENH VENL IENL VSUPPLY IO+
DESCRIPTION EN Pin for Shut-down EN Pin for Shut-down EN Pin for Power-on EN Pin for Power-on Supply Operating Range
Output Source Current into 10 to V+/2 V+ = 5V V+ = 2.4V
IO-
Output Sink Current into 10 to V+/2
V+ = 5V V+ = 2.4V
AC SPECIFICATIONS -3dB BW -3dB Bandwidth EL8171 Gain = 10V/V Gain = 20 Gain = 50 Gain = 100 EL8172 Gain = 100 Gain = 200 Gain = 500 Gain = 1000 eN Input Noise Voltage EL8171 EL8172 Input Noise Voltage Density EL8171 EL8172 iN Input Noise Current Density EL8171, fo = 1kHz EL8172, fo = 1kHz CMRR @ 60Hz Input Common Mode Rejection Ratio EL8171 EL8172 PSRR+ @ 120Hz PSRR- @ 120Hz Power Supply Rejection Ratio (V+) EL8171 EL8172 Power Supply Rejection Ratio (V-) EL8171 EL8172 VCM = 1VPP, RL = 10k to VCM V+, V- = 2.5V, VSOURCE = 1VPP, RL = 10k to VCM V+, V- = 2.5V, VSOURCE = 1VPP, RL = 10k to VCM fo = 1kHz f = 0.1Hz to 10Hz 450 210 66 33 170 70 25 12 14 10 220 80 0.9 0.2 85 100 90 92 97 92 kHz kHz kHz kHz kHz kHz kHz kHz VP-P VP-P nV/Hz nV/Hz pA/Hz pA/Hz dB dB dB dB dB dB
TRANSIENT RESPONSE SR NOTES: 1. Parts are 100% tested at +25C. Over temperature limits established by characterization and are not production tested. 2. VSUPPLY = +5.25V max when VENL = +V (device in disable state). Slew Rate RL = 1k to GND 0.4 0.35 0.55 0.7 0.7 V/s
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FN6293.3 August 3, 2007
EL8171, EL8172 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, VEN = V-, RL = Open, unless otherwise specified.
70 60 50 GAIN (dB) 40 30 20 10 GAIN = 1000 GAIN = 500 GAIN (dB) GAIN = 200 GAIN = 100 GAIN = 50 GAIN = 20 GAIN = 10 70 60 50 40 30 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M COMMON-MODE INPUT = 1/2V+ 90 GAIN = 10,000 80 GAIN = 5,000 GAIN = 2,000 GAIN = 1,000 GAIN = 500 GAIN = 200 GAIN = 100 COMMON-MODE INPUT = 1/2V+
1
10
100 1k 10k FREQUENCY (Hz)
100k
1M
FIGURE 1. EL8171 FREQUENCY RESPONSE vs CLOSED LOOP GAIN
FIGURE 2. EL8172 FREQUENCY RESPONSE vs CLOSED LOOP GAIN
25
45 40 V+ = 5V
20 GAIN (dB)
V+ = 5V GAIN (dB)
35 30 V+ = 2.4V
15
V+ = 2.4V AV = 10 RL = 10k CL = 10pF RF/RG = 10 RF = 1k RG = 100 10 100 1k 10k 100k 1M FREQUENCY (Hz)
25 20 15 10 5 0 AV = 100 RL = 10k CL = 10pF RF/RG = 100 RF = 10k RG = 100 10 100 1k 10k
10
5 0
100k
1M
FREQUENCY (Hz)
FIGURE 3. EL8171 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
FIGURE 4. EL8172 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
25 470pF
50 820pF 45 2200pF 1200pF GAIN (dB)
20 GAIN (dB) 220pF 15 AV = 10 R = 10k CL = 10pF RF/RG = 10 RF = 10k RG = 100 10 100 1k 10k 100k 1M FREQUENCY (Hz) 100pF 40 820pF AV = 10 R = 10k CL = 10pF RF/RG = 10 RF = 10k RG = 100 10 100 1k 10k 100k 1M FREQUENCY (Hz) 56pF
35
10
30
5
25
FIGURE 5. EL8171 FREQUENCY RESPONSE vs CLOAD
FIGURE 6. EL8172 FREQUENCY RESPONSE vs CLOAD
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FN6293.3 August 3, 2007
EL8171, EL8172 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, VEN = V-, RL = Open, unless otherwise specified. (Continued)
90 80 70 60 CMRR (dB) 50 40 30 20 10 0 -10 10 100 1k 10k 100k 1M 0 10 100 1k 10k 100k 1M AV = 10 CMRR (dB) 100 80 60 AV = 100 40 20 120
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 7. EL8171 CMRR vs FREQUENCY
FIGURE 8. EL8172 CMRR vs FREQUENCY
120 100 80 PSRR (dB) 60 PSRR40 AV = 10 20 0 10 100 1k 10k 100k 1M FREQUENCY (Hz) PSRR+ PSRR (dB)
120 100 80 60 PSRR40 AV = 10 20 0 10
PSRR+
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 9. EL8171 PSRR vs FREQUENCY
FIGURE 10. EL8172 PSRR vs FREQUENCY
1400 INPUT VOLTAGE NOISE (nV/Hz) 1200 1000 800 600 AV = 10 400 200 0 INPUT VOLTAGE NOISE (nV/Hz)
700 600 500 400 300 200 100 0 1 10 100 1k 10k 100k FREQUENCY (Hz) AV = 100
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 11. EL8171 VOLTAGE NOISE SPECTRAL DENSITY
FIGURE 12. EL8172 VOLTAGE NOISE SPECTRAL DENSITY
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FN6293.3 August 3, 2007
EL8171, EL8172 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, VEN = V-, RL = Open, unless otherwise specified. (Continued)
6 CURRENT NOISE (pA/Hz) 5 4 3 2 1 0 2.0 1.8 CURRENT NOISE (pA/Hz) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 1 10 100 1k 10k 100k 1 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) AV = 100
AV = 10
FIGURE 13. EL8171 CURRENT NOISE SPECTRAL DENSITY
FIGURE 14. EL8172 CURRENT NOISE SPECTRAL DENSITY
VOLTAGE NOISE (5V/DIV)
VOLTAGE NOISE (2V/DIV)
TIME (1s/DIV)
TIME (1s/DIV)
FIGURE 15. EL8171 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 10)
FIGURE 16. EL8172 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 100)
80 N = 1000 75 SUPPLY CURRENT (A) 70 65 60 55 50 45 40 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN MAX SUPPLY CURRENT (A)
90 85 80 75 70 65 60 55 50 45 40 -40
N = 1500 MAX
MEDIAN
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 17. EL8171 SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
FIGURE 18. EL8172 SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
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FN6293.3 August 3, 2007
EL8171, EL8172 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, VEN = V-, RL = Open, unless otherwise specified. (Continued)
5.0 N = 1000 SUPPLY CURRENT (A) SUPPLY CURRENT (A) 4.5 MAX 4.0 3.5 3.0 2.5 2.0 1.5 -40 MEDIAN MIN 20 18 16 14 12 10 8 6 4 2 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 0 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MAX MEDIAN MIN N = 1500
FIGURE 19. EL8171 SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = 2.5V, VEN = V+, VIN = 0V
FIGURE 20. EL8172 SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = 2.5V, VEN = V+, VIN = 0V
2.5 N = 1000 2.0 1.5 1.0 MAX
0.7 N = 1500 0.5 MAX 0.3
VOS (V)
VOS (V)
0.5 0 -0.5 -1.0 -1.5 -2.0 -40 -20 0 20
0.1 -0.1 -0.3 -0.5
MEDIAN
MEDIAN
MIN
MIN 40 60 80 100 120 -0.7 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 21. EL8171 VOS vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
FIGURE 22. EL8172 VOS vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
2.5 2.0 1.5 1.0 N = 1000
0.9 0.7 MAX N = 1500 MAX
0.5
VOS (V)
0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) MIN MEDIAN
VOS (V)
0.3 0.1 -0.1 -0.3 -0.5 -0.7 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) MIN MEDIAN
FIGURE 23. EL8171 VOS vs TEMPERATURE, V+, V- = 1.2V, VIN = 0V
FIGURE 24. EL8172 VOS vs TEMPERATURE, V+, V- = 1.2V, VIN = 0V
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FN6293.3 August 3, 2007
EL8171, EL8172 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, VEN = V-, RL = Open, unless otherwise specified. (Continued)
140 N = 1000 130 120 110 100 90 MIN 80 -40 -20 0 20 40 60 80 100 120 80 -40 -20 0 20 MEDIAN MAX 130 120 110 MEDIAN 100 90 MIN 40 60 80 100 120 140 N = 1500 MAX
CMRR (dB)
TEMPERATURE (C)
CMRR (dB)
TEMPERATURE (C)
FIGURE 25. EL8171 CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V, V+, V- = 2.5V
FIGURE 26. EL8172 CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V, V+, V- = 2.5V
140 N = 1000 130 120 PSRR (dB) PSRR (dB) 110 100 MEDIAN 90 80 MIN 70 60 -40 -20 0 20 40 60 80 100 120 MAX
140 130 120 110 100 90 80 70 60 -40
N = 1500
MAX
MEDIAN
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 27. EL8171 PSRR vs TEMPERATURE, V+, V- = 1.2V TO 2.5V
FIGURE 28. EL8172 PSRR vs TEMPERATURE, V+, V- = 1.2V TO 2.5V
0.7 0.6 GAIN ERROR (%)
1.5 N = 1000 1.3 MAX GAIN ERROR (%) 1.1 0.9 0.7 0.5 0.3 0.1 100 120 -0.1 -40 MIN -20 0 20 40 60 80 100 120 TEMPERATURE (C) MEDIAN MAX N = 1500
0.5 0.4 0.3 0.2 0.1 0 -0.1 -40 -20 0 MIN
MEDIAN
20 40 60 80 TEMPERATURE (C)
FIGURE 29. EL8171% GAIN ERROR vs TEMPERATURE, RL = 100k
FIGURE 30. EL8172% GAIN ERROR vs TEMPERATURE, RL = 100k
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FN6293.3 August 3, 2007
EL8171, EL8172 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, VEN = V-, RL = Open, unless otherwise specified. (Continued)
4.91 N = 1000 4.90 4.89 MAX VOUT (V) VOUT (V) 4.88 4.87 4.86 4.85 4.84 4.83 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MEDIAN MIN 4.84 4.83 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 4.88 4.87 4.86 4.85 MIN MEDIAN MAX 4.90 4.89 4.91 N = 1500
FIGURE 31. EL8171 VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
FIGURE 32. EL8172 VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
200 N = 1000 180 MAX VOUT (mV) VOUT (mV) 160 140 120 MIN 100 MEDIAN
180 170 160 150 140 130 120 110 100
N = 1000 MAX MEDIAN
MIN
80 -40
-20
0
20
40
60
80
100
120
90 -40
-20
0
TEMPERATURE (C)
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 33. EL8171 VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
FIGURE 34. EL8172 VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
0.65 MAX 0.60 +SLEW RATE (V/s) 0.55 0.50 0.45 0.40 0.35 0.30 -40 MIN +SLEW RATE (V/s) N = 1000 MEDIAN
0.60 0.58 0.56 0.54 0.52 0.50 0.48 0.46 0.44 0.42 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 0.40 -40
N = 1500
MAX
MEDIAN
MIN
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 35. EL8171 +SLEW RATE vs TEMPERATURE, INPUT = 0.015V @ GAIN + 100
FIGURE 36. EL8172 +SLEW RATE vs TEMPERATURE, INPUT = 0.015V @ GAIN + 100
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FN6293.3 August 3, 2007
EL8171, EL8172 Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, VEN = V-, RL = Open, unless otherwise specified. (Continued)
0.70 0.65 0.60 - SLEW RATE (V/S) 0.55 0.50 0.45 MIN 0.40 0.35 0.30 -40 -20 0 20 40 60 80 100 120 0.40 -40 -20 0 20 40 60 80 100 120 MEDIAN -SLEW RATE (V/S) 0.60 0.65 N = 1000 MAX N = 1500 MAX
0.55
MEDIAN
0.50
0.45
MIN
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 37. EL8171 -SLEW RATE vs TEMPERATURE, INPUT = 0.015V @ GAIN + 100
FIGURE 38. EL8172 -SLEW RATE vs TEMPERATURE, INPUT = 0.015V @ GAIN + 100
Pin Descriptions
EL8171/EL8172 1 PIN NAME EN EQUIVALENT CIRCUIT Circuit 2 PIN FUNCTION Active LOW logic pins. When pulled above 2V, the corresponding channel turns off and OUT is high impedance. A channel is enabled when pulled below 0.8V. Built in pull downs define each EN pin LOW when left floating. High impedance input terminals. EL8172 input circuit is shown in Circuit 1A, and the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it is recommended that the terminals are not overdriven beyond 1V and the input current must never exceed 5mA. Negative supply terminal. High impedance feedback terminals. EL8172 input circuit is shown in Circuit 1A, and the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it is recommended that the terminals are not overdriven beyond 1V and the input current must never exceed 5mA. Positive supply terminal. Output Voltage.
V+ V+ LOGIC PIN VCIRCUIT 2 V+ INFBIN+ FB+ VCIRCUIT 3 OUT VVCIRCUIT 4
2 3
ININ+
Circuit 1A, Circuit 1B Circuit 1A, Circuit 1B
4 5 8
VFBFB+
Circuit 4 Circuit 1A, Circuit 1B Circuit 1A, Circuit 1B
7 6
V+ VOUT
Circuit 4 Circuit 3
V+ INFBIN+ FB+ V-
V+
CAPACITIVELY COUPLED ESD CLAMP
CIRCUIT 1A
CIRCUIT 1B
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FN6293.3 August 3, 2007
EL8171, EL8172 Description of Operation and Application Information
Product Description
The EL8171 and EL8172 are micropower instrumentation amplifiers (in-amps) which deliver rail-to-rail input amplification and rail-to-rail output swing on a single 2.4V to 5.5V supply. The EL8171 and EL8172 also deliver excellent DC and AC specifications while consuming only 65A typical supply current. Because EL8171 and EL8172 provide an independent pair of feedback terminals to set the gain and to adjust the output level, these in-amps achieve high common-mode rejection ratio regardless of the tolerance of the gain setting resistors. The EL8171 is internally compensated for a minimum closed loop gain of 10 or greater, well suited for moderate to high gains. For higher gains, the EL8172 is internally compensated for a minimum gain of 100. An EN pin is used to reduce power consumption, typically 4.5A, while the instrumentation amplifier is disabled.
Output Stage and Output Voltage Range
A pair of complementary MOSFET devices drive the output VOUT to within a few mV of the supply rails. At a 100k load, the PMOS sources current and pulls the output up to 4mV below the positive supply, while the NMOS sinks current and pulls the output down to 4mV above the negative supply, or ground in the case of a single supply operation. The current sinking and sourcing capability of the EL8171 and EL8172 are internally limited to less than 35mA.
Gain Setting
VIN, the potential difference across IN+ and IN-, is replicated (less the input offset voltage) across FB+ and FB-. The obsession of the EL8171 and EL8172 in-amp is to maintain the differential voltage across FB+ and FB- equal to IN+ and IN-; (FB+ - FB-) = (IN+ - IN-). Consequently, the transfer function can be derived. The gain of the EL8171 and EL8172 is set by two external resistors, the feedback resistor RF, and the gain resistor RG.
2.4V TO 5.5V EN 7 VIN/2 2 IN+ 3 INVIN/2 8 FB+ VCM 5 FB+ EL8171/2 + 4 VV+ 1 EN 6
Input Protection
All input and feedback terminals of the EL8171 and EL8172 have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode drop beyond the supply rails. The inverting inputs and FB- inputs have ESD diodes to the V-rail, and the non-inverting inputs and FB+ terminals have ESD diodes to the V+ rail. The EL8172 has additional back-to-back diodes across the input terminals and also across the feedback terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. On the other hand, the EL8171 has no clamps to limit the differential voltage on the input terminals allowing higher differential input voltages at lower gain applications. It is recommended however, that the input terminals of the EL8171 are not overdriven beyond 1V to avoid offset drift. An external series resistor may be used as an external protection to limit excessive external voltage and current from damaging the inputs.
VOUT
RG
RF
FIGURE 39. CIRCUIT 1 - GAIN IS BY EXTERNAL RESISTORS RF AND RG RF V OUT = 1 + ------- V IN R G (EQ. 1)
Input Stage and Input Voltage Range
The input terminals (IN+ and IN-) of the EL8171 and EL8172 are single differential pair P-MOSFET devices aided by an Input Range Enhancement Circuit (IREC) to increase the headroom of operation of the common-mode input voltage. The feedback terminals (FB+ and FB-) also have a similar topology. As a result, the input common-mode voltage range of both the EL8171 and EL8172 is rail-to-rail. These in-amps are able to handle input voltages that are at or slightly beyond the supply and ground making these in-amps well suited for single 5V or 3.3V low voltage supply systems. There is no need to move the common-mode input of the inamps to achieve symmetrical input voltage.
In Figure 39, the FB+ pin and one end of resistor RG are connected to GND. With this configuration, Equation 1 is only true for a positive swing in VIN; negative input swings will be ignored and the output will be at ground.
Reference Connection
Unlike a three-op amp instrumentation amplifier, a finite series resistance seen at the REF terminal does not degrade the EL8171 and EL8172's high CMRR performance, eliminating the need for an additional external buffer amplifier. Circuit 2 (Figure 40) uses the FB+ pin to provide a high impedance REF terminal.
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FN6293.3 August 3, 2007
EL8171, EL8172
2.4V TO 5.5V 7 VIN/2 2 IN+ 3 INVIN/2 8 FB+ VCM 2.4V TO 5.5V R1 REF R2 RG RF 5 FB+ EL8171/2 + 4 VV+ 1 EN 6 EN
External Resistor Mismatches
Because of the independent pair of feedback terminals provided by the EL8171 and EL8172, the CMRR is not degraded by any resistor mismatches. Hence, unlike a three op amp and especially a two op amp in-amp, the EL8171 and EL8172 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing CMRR performance. The EL8171 and EL8172 CMRR will be maintained regardless of the tolerance of the resistors used.
VOUT
Gain Error and Accuracy
The EL8172 has a Gain Error (EG) of 0.2% typical. The EL8171 has an EG of 0.15% typical. The gain error indicated in the "Electrical Specifications" table on page 2 is the inherent gain error of the EL8171 and EL8172 and does not include the gain error contributed by the resistors. There is an additional gain error due to the tolerance of the resistors used. The resulting non-ideal transfer function effectively becomes:
RF V OUT = 1 + ------- x [ 1 - ( E RG + E RF + E G ) ] x V IN R G (EQ. 4)
FIGURE 40. CIRCUIT 2 - GAIN SETTING AND REFERENCE CONNECTION RF RF V OUT = 1 + ------- ( V IN ) + 1 + ------- ( V REF ) R G R G (EQ. 2)
The FB+ pin is used as a REF terminal to center or to adjust the output. Because the FB+ pin is a high impedance input, an economical resistor divider can be used to set the voltage at the REF terminal without degrading or affecting the CMRR performance. Any voltage applied to the REF terminal will shift VOUT by VREF times the closed loop gain, which is set by resistors RF and RG. See Circuit 2 (Figure 40). Note that any noise or unwanted signals on the reference supply will be amplified at the output according to Equation 2. The FB+ pin can also be connected to the other end of resistor, RG. See Circuit 3 (Figure 41). Keeping the basic concept that the EL8171 and EL8172 in-amps maintain constant differential voltage across the input terminals and feedback terminals (IN+ - IN- = FB+ - FB-), the transfer function of Circuit 3 can be derived. Note that the VREF gain term is eliminated and susceptibility to external noise is reduced, however the VREF source must be capable of sourcing or sinking the feedback current from VOUT through RF and RG.
2.4V TO 5.5V 7 VIN/2 2 IN+ 3 INVIN/2 8 FB+ VCM 5 FB+ EL8171/2 + 4 VV+ 1 EN 6 EN
Where:
ERG = Tolerance of RG ERF = Tolerance of RF EG = Gain Error of the EL8171 or EL8172
The term [1-(ERG +ERF +EG)] is the deviation from the theoretical gain. Thus, (ERG +ERF +EG) is the total gain error. For example, if 1% resistors are used for the EL8171, the total gain error would be:
= ( E RG + E RF + E G ( typical ) ) = ( 0.01 + 0.01 + 0.003 ) = 2.3% (EQ. 5)
Disable/Power-Down
The EL8171 and EL8172 can be powered down reducing the supply current to typically 4.5A. When disabled, the output is in a high impedance state. The active low EN bar pin has an internal pull-down and hence can be left floating and the in-amp enabled by default. When the EN bar is connected to an external logic, the in-amp will power down when EN bar is pulled above 2V, and will power on when EN bar is pulled below 0.8V.
VOUT
RG VREF
RF
FIGURE 41. CIRCUIT 3 - REFERENCE CONNECTION WITH AN AVAILABLE VREF RF V OUT = 1 + ------- ( V IN ) + ( V REF ) R G (EQ. 3)
12
FN6293.3 August 3, 2007
EL8171, EL8172
Power Dissipation
It is possible to exceed the +150C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 6:
T JMAX = T MAX + ( JA xPD MAXTOTAL ) (EQ. 6)
where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated as shown in Equation 7:
V OUTMAX PD MAX = 2*V S x I SMAX + ( V S - V OUTMAX ) x --------------------------RL (EQ. 7)
where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Supply voltage (Magnitude of V+ and V-) * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 13
FN6293.3 August 3, 2007
EL8171, EL8172 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
14
FN6293.3 August 3, 2007

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